Thermal effects in packaging high power light emitting diode arrays

The package and system level temperature distributions of a high power (>1 W) light emitting diode (LED) array have been investigated using numerical heat flow models. For this analysis, a thermal resistor network model was combined with a 3D finite element submodel of an LED structure to predict system and die level temperatures. The impact of LED array density, LED power density, and active versus passive cooling methods on device operation were calculated. In order to help understand the role of various thermal resistances in cooling such compact arrays, the thermal resistance network was analyzed in order to estimate the contributions from materials as well as active and passive cooling schemes. Finally, an analysis of a ceramic packaging architecture is performed in order to give insight into methods to reduce the packaging resistance for high power LEDs.