• Title of article

    Efficient algorithm for FPGA board routing

  • Author/Authors

    M.، Chrzanowska-Jeske, نويسنده , , X.، Song, نويسنده , , M.، Dharmadhikari, نويسنده , , O.A.، Mohamed, نويسنده ,

  • Issue Information
    روزنامه با شماره پیاپی سال 2004
  • Pages
    -468
  • From page
    469
  • To page
    0
  • Abstract
    A simple and fast algorithm for solving the two-terminal board level routing problem in FPGA-based logic emulation systems is presented. The method is based on the net scan selection process. Experimental results are the first implemented results for an algorithm presented previously. The comparison results show that the current approach achieves better effectiveness and uses less CPU time.
  • Keywords
    Hydrograph
  • Journal title
    IEE Electronics Letters
  • Serial Year
    2004
  • Journal title
    IEE Electronics Letters
  • Record number

    107255

    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=10&DC=107255