Title of article
Special-purpose computer for holography HORN-4 with recurrence algorithm Original Research Article
Author/Authors
Tomoyoshi Shimobaba، نويسنده , , Sinsuke Hishinuma، نويسنده , , Tomoyoshi Ito، نويسنده ,
Issue Information
دوهفته نامه با شماره پیاپی سال 2002
Pages
11
From page
160
To page
170
Abstract
We designed and built a special-purpose computer for holography, HORN-4 (HOlographic ReconstructioN) using PLD (Programmable Logic Device) technology. HORN computers have a pipeline architecture. We use HORN-4 as an attached processor to enhance the performance of a general-purpose computer when it is used to generate holograms using a “recurrence formulas” algorithm developed by our previous paper. In the HORN-4 system, we designed the pipeline by adopting our “recurrence formulas” algorithm which can calculate the phase on a hologram. As the result, we could integrate the pipeline composed of 21 units into one PLD chip. The units in the pipeline consists of one BPU (Basic Phase Unit) unit and twenty CU (Cascade Unit) units. These CU units can compute twenty light intensities on a hologram plane at one time. By mounting two of the PLD chips on a PCI (Peripheral Component Interconnect) universal board, HORN-4 can calculate holograms at high speed of about 42 Gflops equivalent. The cost of HORN-4 board is about 1700 US dollar. We could obtain 800×600 grids hologram from a 3D-image composed of 415 points in about 0.45 sec with the HORN-4 system.
Keywords
systolic array , Hardware , Holography , Special-purpose computer , Hologram , Computer-generated hologram , Image processing
Journal title
Computer Physics Communications
Serial Year
2002
Journal title
Computer Physics Communications
Record number
1136069
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