A new experimental method to extract EEPROM tunnel oxide trap density from threshold voltage distributions

To ensure the reliability of EEPROM devices, it is significant to monitor the evolution of the memory array threshold voltage (VT) distribution. In this work, impact of endurance and retention tests is evaluated on EEPROMs. Based on the extrinsic VT population evolution, the oxide tunnel trap concentration (Nit) is extracted using a 700 kbits EEPROM test chip. Data retention after Write/Erase (W/E) cycles is one of the most important reliability issues in EEPROM devices. The electric high-field stress induced during W/E cycles is mainly responsible for the degradation of the retention time because it creates intrinsic failures or traps in the EEPROM tunnel oxide. These traps serve as bridges for the trap to trap conduction current (ITAT) in the tunnel oxide. EEPROM data retention degradation due to this stress-induced leakage current (SILC) impacts directly the EEPROM VT distribution by creating extrinsic populations. To track accurately extrinsic cellsʹ evolution (tail bits), representative of Nit parameter, an innovative experimental plan is proposed.