Design of 0.25 μm 2.7 V 2T2C 4 Mb asynchronous ferroelectric random access memory (FRAM) for mobile applications

In order to fabricate nonvolatile 4 Mb ferroelectric random access memory (FRAM) for the application to portable electronic devices, we proposed two noble techniques; (1) shared sense amplifier arrangement structure for reducing a chip size, active current, and power consumption, and (2) address transition detection (ATD) control scheme for asynchronous operation and limited address skew-free. We successfully developed 4 Mb FRAM with the address access time of 90 ns, read/write cycle time of 100 ns, and limited address skew-free of 20 ns at 2.7 V and 85 °C.