Design methodology adopting normalized power-delay-and-area product (N-PDAP) for digital-circuit optimization

A guideline for compelling issues such as power dissipation, delay time, and chip area consumption in the modern digital-circuit design is proposed. The guideline incorporates a new concept of normalized power-delay-and-area product (N-PDAP). The validity of the concept has been proved in comparison with that of the conventional PDP concept in several behavioral blocks by HSPICE simulations. The results has been adopted to a digital delta–sigma modulator and successfully verified.