Super self-aligned technology of ultra-shallow junction in MOSFETs using selective Si1−xGex CVD

The fabrication process is investigated to improve the super self-aligned ultra-shallow junction electrode MOSFET (S3EMOSFET) by utilizing in-situ impurity-doped Si1−xGex selective epitaxy on the source/drain regions at 550 °C by means of LPCVD. It is found that phosphorus-doped Si1−xGex films with a high Ge fraction have low solid solubility of electrically active phosphorus, and boron-doped Si1−xGex films with a high Ge fraction have a low barrier height for tungsten. Therefore, both a Si1−xGex film with a low Ge fraction and one with a high Ge fraction are necessary to fabricate n- and p-MOSFETs with low contact resistivity. A super self-aligned process on the source/drain regions using selective in-situ-doped Si1−xGex growth, shallow junction formation, and subsequent very-low-temperature tungsten growth are effective in reducing the source/drain resistance. 0.1 μm gate pMOSFETs are fabricated by means of the super self-aligned technology. They show good drain current drivability and roll-off characteristics due to the suppression of parasitic source/drain resistance and the ultra-shallow source/drain layers.