Fabrication of 100nm Nano Pillars on Silicon

The main objective of the project was to fabricate a vertical Gate All Around (GAA) p-i-n doped Tunneling Field Effect Transistor (TFET) device for which obtaining precise nanopillar structure was needed, to be optimized and achieved. This paper specifically focused on fabrication of Nano pillars on Silicon wafer using Hydrogen Silsesquioxane (HSQ). Initially we experimented with two methods Plasma Asher and AMAT Etch chamber. We have chosen HSQ resist for patterning high-resolution 100 nm circular dot structures for the fabrication of densely packed suspended vertical Si Nano pillars. This provides high etching resistivity of HSQ and better convenience of pattern transfer and selectivity from resist to various materials. In addition, epitaxial semiconductor Si wafers with different semiconductor layers have been directly implemented to render nanopillars with self-aligned and well-defined homo or hetero junction properties. These structures may be used to analyze evidence of the primary design of devices such as vertical surround Gate field effect transistors.