Title of article
Optimizing Power in ASIC Behavioral Synthesis
Author/Authors
Raul San Martin John P. Knight ، نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 1996
Pages
13
From page
58
To page
70
Abstract
Attacking power consumption at the behavioral level exploits an applicationʹs inherent parallelism to maintain performance while compensating for slower, less power-hungry operators. The authorsʹ method and tool optimize and evaluate the effects of power-saving strategies on performance and silicon area
Journal title
IEEE Design and Test of Computers
Serial Year
1996
Journal title
IEEE Design and Test of Computers
Record number
431082
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