Title of article
Collateral ASIC Test
Author/Authors
Al Bailey Tim Lada Jim Preston ، نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 1997
Pages
9
From page
55
To page
63
Abstract
Boundary scan techniques fall short in testing ASICs embedded in printed-board assemblies. By providing a new interconnect, this technique extends the benefits of boundary scan to ASICs whether they incorporate the Bscan interface or not
Journal title
IEEE Design and Test of Computers
Serial Year
1997
Journal title
IEEE Design and Test of Computers
Record number
431126
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