Title of article
Guest Editorsʹ Introduction: GALS Design and Validation
Author/Authors
Mike Kishinevsky، نويسنده , , Intel Sandeep K. Shukla، نويسنده , , Virginia Tech Kenneth S. Stevens، نويسنده , , University of Utah ، نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2007
Pages
3
From page
414
To page
416
Abstract
Globally asynchronous, locally synchronous (GALS) design has grown in popularity in both academia and industry. Breaking the synchrony assumption in digital design is often unsettling for designers, and to alleviate the difficulty, researchers in EDA have been proposing various GALS-based solutions. However, the tools, verification techniques, and testing methodologies for asynchronous designs are not as widespread as for synchronous digital design, leading to the hitherto limited usage of GALS design approaches. This special issue introduces some of the basic issues of GALS design and validation in the hardware domain. The hope is that this special issue will generate more interest by researchers and industry practitioners in creating design tools, techniques, and validation methodologies for GALS design.
Journal title
IEEE Design and Test of Computers
Serial Year
2007
Journal title
IEEE Design and Test of Computers
Record number
431765
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