• Title of article

    A Highly Scalable GALS Crossbar Using Token Ring Arbitration

  • Author/Authors

    Tejpal Singh، نويسنده , , Intel Alexander Taubin، نويسنده , , Boston University, Graduate School، نويسنده ,

  • Issue Information
    روزنامه با شماره پیاپی سال 2007
  • Pages
    9
  • From page
    464
  • To page
    472
  • Abstract
    With increases in die size and clock frequency, driving signals across dies is becoming increasingly more difficult. To reduce clock skew and power, the general trend is to use multiple clock domains on a single die, making both synchronous and asynchronous interclock domain communication possible. The 2005 International Technology Roadmap for Semiconductors states that asynchronous global signaling is required to handle multiple clock domains. According to the ITRS, the globally asynchronous, locally synchronous (GALS) methodology should address this problem. This methodology enables the use of a clocked design for smaller-scale functional units, and this has been the standard approach in industry. The GALS methodology also makes it possible to connect synchronous functional units using robust asynchronous interconnects. The efficient design of an asynchronous crossbar is one of the most promising implementations of the GALS methodology. In this article, we present a low-latency crossbar that uses a distributed arbitration mechanism in the form of token rings. We further improve the latency of this implementation by implementing asynchronous-to-synchronous and synchronous-to-asynchronous interface logic using bidirectional signals. These signals serve as requests and acknowledges, and they exhibit a very fast GasP-like implementation - although, unlike GasP, this implementation is not self-resetting.
  • Journal title
    IEEE Design and Test of Computers
  • Serial Year
    2007
  • Journal title
    IEEE Design and Test of Computers
  • Record number

    431770