Electrical characteristics of Si-nanoparticle/Si-nanowire-based field-effect transistors

In this study, Si-nanoparticle(NP)/Si-nanowire- (NW)-based field-effect transistors (FETs) with a top-gate geometry were fabricated and characterized. In these FETs, Si NPs were embedded as localized trap sites in Al2O3 topgate layers coated on Si NW channels. Drain current versus drain voltage (IDS-VDS) and drain current versus gate voltage (IDS-VGS) were measured for the Si NP/Si NW-based FETs to investigate their electrical and memory characteristics. The Si NW channels were depleted at VGS = 9 V, indicating that the devices functioned as p-type depletionmode FETs. The top-gate Si NW-based FETs decorated with Si NPs show counterclockwise hysteresis loops in the IDSVGS curves, revealing their significant charge storage effect.