• Title of article

    The delay of circuits whose inputs have specified arrival times Original Research Article

  • Author/Authors

    Dieter Rautenbach، نويسنده , , Christian Szegedy، نويسنده , , Jürgen Werber، نويسنده ,

  • Issue Information
    روزنامه با شماره پیاپی سال 2007
  • Pages
    11
  • From page
    1233
  • To page
    1243
  • Abstract
    Let C be a circuit representing a straight-line program on n inputs x1,x2,…,xnx1,x2,…,xn. If for 1⩽i⩽n1⩽i⩽n an arrival timeti∈N0ti∈N0 for xixi is given, we define the delay of xixi in C as the sum of titi and the maximum number of gates on a directed path in C starting in xixi. The delay of C is defined as the maximum delay of one of its inputs. The notion of delay is a natural generalization of the notion of depth. It is of practical interest because it corresponds exactly to the static timing analysis used throughout the industry for the analysis of the timing behaviour of a chip. We prove a lower bound on the delay and construct circuits of close-to-optimal delay for several classes of functions. We describe circuits solving the prefix problem on n inputs that are of essentially optimal delay and of size O(nlog(logn))O(nlog(logn)). Finally, we relate delay to formula size.
  • Keywords
    Circuit , Straight-line program , Depth , Prefix problem , Computer arithmetic , size , Static timing analysis , VLSI design
  • Journal title
    Discrete Applied Mathematics
  • Serial Year
    2007
  • Journal title
    Discrete Applied Mathematics
  • Record number

    886500