Title of article
Minimizing pattern count for interconnect test under a ground bounce constraint
Author/Authors
B.، Vermeulen, نويسنده , , E.J.، Marinissen, نويسنده , , H.، Hollmann, نويسنده , , R.G.، Bennetts, نويسنده ,
Issue Information
روزنامه با شماره پیاپی سال 2003
Pages
-7
From page
8
To page
0
Abstract
When testing the interconnect structures on a board, test programmers sometimes ask, How can I control the test pattern generation process to avoid ground bounce problems during Extest mode? Those wishing to satisfy a simultaneously-switching-outputs constraint will find several new solutions in this article.
Keywords
leukemia
Journal title
IEEE Design and Test of Computers
Serial Year
2003
Journal title
IEEE Design and Test of Computers
Record number
90268
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