A design approach to passive interconnects for single flux quantum logic circuits

We developed a design approach for interface circuits to connect Single Flux Quantum (SFQ) cells by using passive transmission lines (PTLʹs). In the approach, an interface circuit between a PTL and JTL is optimized to obtain a standard interface circuit, and then, modifications are made to previously designed SFQ cells and the standard interface circuit to connect the SFQ cells by using PTLʹs. The key point is the use of approximately the same interface circuit with every SFQ cell to maintain the matching condition between the interface circuit and the PTLʹs. Based on this approach, we designed an interface circuit and a test circuit composed of two D-flip-flops connected using 2-mm-long PTLʹs via the interface circuits. The impedance of the PTL was 2 (omega). We achieved high-speed operation of the test circuit up to 35 GHz with a bias margin of -15/+30%.