• Title of article

    Experimental implementation of an optoelectronic neural network scheduler

  • Author/Authors

    K.J.، Symington, نويسنده , , A.J.، Waddie, نويسنده , , M.R.، Taghizadeh, نويسنده , , J.F، Snowdon, نويسنده , , Y.R.، Randle, نويسنده ,

  • Issue Information
    روزنامه با شماره پیاپی سال 2003
  • Pages
    -556
  • From page
    557
  • To page
    0
  • Abstract
    We describe the design and successful operation of an optoelectronic Hopfield network demonstrator system. The Hopfield network, one of the simpler space-invariant interneuronal connection networks, was chosen due to its observed efficiency in solving optimization tasks. The demonstrator system, based around a free-space diffractive optical interconnect, was designed to perform a range of optimization tasks, in particular those associated with the scheduling of packets through different switching topologies. Experimental optimization of the neural network throughput, for both a crossbar and Banyan switch topology, allows the neural network parameters (e.g., neuron bias, neuron weighting) to be tuned to ensure optimal operation of the network for a particular switch topology. In addition, the demonstrator allows an investigation of the critical parameters governing the interoperation of the different modules. In this paper, we describe the effect of two of these parameters, namely, the operating temperature of the optoelectronic devices and the accuracy of the interconnection fabrication technology. The weighted interconnections in this optoelectronic system are provided by a diffractive optical element/lens combination whilst the neurons are implemented electronically. The transition between the electronic and optical domains is handled by an 8*8 VCSEL array for the electronic-optic interface, and an 8*8 Si photodetector array for the optic-electronic interface. The VCSEL array consists of oxide-confined near-infrared GaAs devices capable of 250-MHz modulation at a wavelength of 960 nm. The diffractive optical interconnect is designed using simulated annealing optimization and fabricated using very large scale integration photolithography. Using these techniques, it is possible to create interconnects with a total efficiency of ~70% and a nonuniformity of <1%.
  • Keywords
    Three-dimensional flow , Navier-Stokes equation , computational grids
  • Journal title
    IEEE Journal of Selected Topics in Quantum Electronics
  • Serial Year
    2003
  • Journal title
    IEEE Journal of Selected Topics in Quantum Electronics
  • Record number

    97093