DocumentCode
14824
Title
Evaluating the Design and Performance of a Single-Chip Parallel Computer Using System-Level Models and Methodology
Author
Mark T. Jones استاد مشاور , Cameron D. Patterson استاد راهنما , James M. Baker Jr استاد مشاور
University
Virginia Polytechnic Institute and state University
Grade
نامعلوم
Major
Master of Science )Eectrical and Computer Engineering(
Number of pages
0
Publish Date
2005
Keyword
Parallel computing , Methodology , SCMP , System-level Design , SYSTEM-ON-A-CHIP
Note
01
Language
انگليسي
Link To Document