An Efficient Power-Area-Delay Modulo 2n-1 Multiplier

Carry propagation is a main problem in Residue Number System (RNS) arithmetic. This overhead can be eliminated by using redundant number representations which results in Redundant Residue Number System (RRNS). The RNS which uses Stored-Unibit-Transfer (SUT) encoding (SUT-RNS) has been shown as an efficient encoding for RRNS. In this paper, we first propose a general algorithm for radix-2h SUT-RNS digit multiplication. Then, we implement an efficient pipeline multiplier which is appropriate for frequent multiplications. The results indicate that the radix-8 SUT-RNS modulo 2n-1 multiplier outperforms area and power (energy/operation) of the previous efficient RRNS multipliers. Besides, it reaches the speed of the most high-speed RRNS multiplier.