An Applicable High-Efficient CNTFET-Based Full Adder Cell for Practical Environments

Full adder is among the most practical logic blocks. It is the main arithmetical component of all digital systems. This paper presents the novel design of a high-speed and high-efficient full adder cell which is on the basis of low-complex passtransistor logic. Using carbon nanotube field effect transistors, formation of transmission gates are not required and the usage of extra transistors is avoided. It benefits from ultra high computational speed which makes it ideal for high-speed and high-frequency applications. It could be employed in portable devices as it consumes very low power. It has also the advantage of working reliably in spite of fabrication imperfections. Simulations are carried out using Synopsys HSPICE in a realistic test bench and other various strict conditions. Simulation results demonstrate higher efficiency with respect to other conventional and state-of-the-art CNTFET and MOSFET implementations.