Design of Low-Voltage Low-power Dual-Band LNA with Using DS Method to Improve Linearity

Design of Low-Voltage Low-power Dual-Band LNA with Using DS Method to Improve Linearity

In this paper a low-voltage low-power Concurrent Dual-Band Low Noise Amplifier (LNA) with linearity improvement technique is presented. By using advantageous of current reuse (CR) topology andforward body biasing (FBB) technique the proposed LNA can operate at a reduce supply voltage and powerconsumption. The liberalized LNA’s is achieved using auxiliary transistor and utilizing derivative superposition (DS) method. Using TSMC 0.18umprocess, the IIP3 is improved more than 50%, with the cost of decrease 2dB gain for each band. LNA is designed at 2.4GHz and 5.2GHz for IEEE802.11a/b/gapplication with 2.89mW power consumption and 0.7V supply voltage