Reduced Memory Requirement in Hardware Implementation of SVM Classifiers

Reduced Memory Requirement in Hardware Implementation of SVM Classifiers

Support Vector Machine (SVM) is a powerful machine-learning tool for pattern recognition, decision making and classification. SVM classifiers outperform otherclassification technologies in many applications. In this paper, two implementations of SVM classifiers are presented using Logarithmic Number System. In the basic classifier alloperations (multiplication, addition and …) are performed using logarithmic numbers. In the logarithmic domain,multiplication and division can be simply treated as addition or subtraction respectively. The main disadvantage of LNS is the large memory requirement for high precision addition andsubtraction. In the improved classifier, multiplication operation is performed using logarithmic numbers, but addition andsubtraction operations are performed with linear fixed point numbers. In this research a lookup table and a shifter are usedto convert LNS numbers to fixed point numbers. The required memory of the improved classifier is 197 times less than the required memory of the basic system without any degradation ofthe SVM classification accuracy