Design of a sub 2dB Noise Figure Wideband LNA Using MDS Technique in CMOS Technology

Design of a sub 2dB Noise Figure Wideband LNA Using MDS Technique in CMOS Technology

The main purpose of this paper is to design a wide-band 3-5 GHz Low Noise Amplifier (LNA). The design begins on the schematic level where amplifier is matched to a 50 ohms termination. The match was done by lumped components. The high linearity performance is achieved by Modified Derivative Superposition (MDS) technique that reduces the third-order distortion. The proposed LNA provides an IIP3 of 38dBm, a noise figure (NF) of 1.14 dB, and power gain of 13.9 dB over the bandwidth. The power dissipation of whole proposed LNA is 6.8 mw from 1.41v and 1.15v power supplies. The design and all simulations were done using ADS (Advanced Design System).