A Reliable Full- Swing and High- Performance CLRCL Full Adder

A Reliable Full- Swing and High- Performance CLRCL Full Adder

Full adder cell is the basic building block in various digital circuits. In this paper, a new full-swing and highperformance 16-Transistor full adder based on complementary and level restoring carry logic (CLRCL) structure is presented. We have only used two modules to build our proposed circuit, low-power XNOR (LP-XNOR) gate and transmission-gate (TG) based 2-to-1 multiplexers. Simulation results in 180-nm and 90- nm CMOS technologies using HSPICE simulator prove our new design low-power consumption as well as reliable operation in comparison with some previously reported full adders. We have gained 8%-57% (1%-51%) and 6%-59% (10%-70%) enhancement in terms of power consumption and Power-Delay Product (PDP), respectively at 180-nm (90-nm) technology for 1.8v (1v) supply voltage.