Author/Authors
Ksentini, Nesrine LETI-ENIS/COMELEC, ENST, Tunisia/France , Fakhfakh, Ahmed LETI-ENIS, Tunisia , Loulou, Mourad LETI-ENIS, Tunisia , Masmoudi, Nouri LETI-ENIS, Tunisia , Charlot, Jean Jacques COMELEC, ENST/JJCC, France
Title Of Article
Développement d un outil de synthèse analogique pour les systèmes à courants commutés utilisant VHDL-AMS
شماره ركورد
34167
Abstract
The purpose of this contribution is to develop an Analogue-Synthesis tool for switched current systems. This tool will allow the user to develop and optimize the system to designfrom specifications with a high level simulation. First, a block diagram ofthe design jlow which is going to be used to simulate and characterize SI system is presented. Second, a cell library was developped. It contains VHDLAMS descriptions for two basic memory cells (A and AB Class). This library helped modeling first and second order Sigma-Delta modulators which led to perform a spectrum analysis and achieve a characteristic study.
From Page
63
NaturalLanguageKeyword
modeling , VHDL , AMS , switched , current systems , analogue , synthesis
JournalTitle
Lebanese Science Journal
To Page
75
JournalTitle
Lebanese Science Journal
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