Author/Authors
TAŞKIN, Deniz Trakya Üniversitesi - Mühendislik Mimarlık Fakültesi - Bilgisayar Mühendisliği Bölümü, Turkey , BAYSAL, Kenan Namık Kemal Üniversitesi - Hayrabolu Meslek Yüksekokulu - Bilgi Yönetimi Programı, Turkey , SERT, Eser Trakya Üniversitesi - Edirne Teknik Bilimler Meslek Yüksekokulu - Elektronik Teknolojisi Programı, Turkey , TAŞKIN, Cem Trakya Üniversitesi - Tunca Meslek Yüksekokulu - Bilgisayar Teknolojisi Programı, Turkey , ÖZCAN, Murat Olcay Namık Kemal Üniversitesi - Hayrabolu Meslek Yüksekokulu - Bilgi Yönetimi Programı, Turkey
Title Of Article
DESIGNING HIGH CAPACITY ARTIHMETIC UNIT WITH FPGA USING BY VHDL
شماره ركورد
43967
Abstract
Field Programmable Gate Arrays (FPGA) are most preferred hardware platforms at digital systems, because of flexible design capacity and cheap cost at the research and development level. The reason of preference FPGA systems, instead of building complex circuits at the try and error method are could be program thousands of times using by Very High Speed Hardware Design Language (VHDL) With the merging of computer technology and cryptography science, algorithms, that provide increased security, are started to working with high capacity data. The biggest issue of processing high capacity data is processing time and needs to advanced hardware structure. The aim of this study is to shorten the duration of data processing by practicing to design of hardware that able to process high capacity data.
From Page
143
NaturalLanguageKeyword
FPGA , VHDL , cryptology , computer arithmetic , high capacity arithmetic adder
JournalTitle
Trakya university journal of engineering sciences
To Page
156
JournalTitle
Trakya university journal of engineering sciences
Link To Document