Testing, Testing

As a direct result of the awe-inspiring changes in LSI technology, an 8-bit microcomputer today has an equivalent of 8000 transistors–which for testing purposes are quite inaccessible, said Tudor Finch of Bell Labs in his introduction to Session 8. Finch, who chaired the session, went on to point out that this level of integration forces one to resort to more indirect techniques–e.g., techniques applying stimuli to input pins and observing the corresponding responses. The stimuliresponse behavior for a fault-free chip then characterizes its fault-free signaturere –iations indicate a failure condition. These deviations long with the stimuli test patterns can then be exhaustively catalogued for each and every specific fault condition to yield what is referred to as a "fault-dictionary." The problem, observed Finch, is that the sheer combinatorics of the situation yield literally astronomical numbers, thus excluding exhaustive characterizing techniques. This circumstance has motivated the development of algorithmic as well as heuristic techniques, which for specific fault-models given the correct behavior of a circuit automatically generates all fault-signatures. The relationship of test vectors or patterns required per gate versus circuit complexity was illustrated trated by T. Finch as shown in the figure.