DocumentCode
1001608
Title
An all-CMOS ternary identity cell for VLSI implementation
Author
Heung, A. ; Mouftah, Hussein T.
Author_Institution
Queen´s University, Department of Electrical Engineering, Kingston, Canada
Volume
20
Issue
5
fYear
1984
Firstpage
221
Lastpage
222
Abstract
A ternary identity cell composed only of CMOS transistors is presented. The circuit has fewer transistors and better performance than that of previously reported designs. A nano-watt power consumption and fast switching time are important advantages that this circuit possesses. Applications include buffers, pad drivers and triflops.
Keywords
buffer circuits; field effect integrated circuits; flip-flops; large scale integration; logic circuits; ternary logic; CMOS transistors; VLSI implementation; advantages; all CMOS; buffer; logic design; noise immunity; pad drivers; performance; power consumption; switching time; ternary identity cell; ternary logic; triflops;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19840147
Filename
4249760
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