Switching speed of DCL-gates with high-JcJosephson junctions

Author

Nishino, Toshikazu ; Tarutani, Yoshinobu ; Hatano, Yuji ; Kawabe, Ushio

Author_Institution

Central Research Laboratory, Hitachi, Ltd., Tokyo, Japan

Volume

Issue

fYear

1985

fDate

3/1/1985 12:00:00 AM

Firstpage

959

Lastpage

962

Abstract

Switching speed and bias current margin of DCL-gates composed of high-Jcjunctions are investigated by both numerical calculation and experimental measurement. It is shown that switching speed is improved by increasing Jc. However, the switching speed and bias current margin of DCL-gates are restricted by the increase in the minimum resetting current for the high-Jcjunction. The theoretical Jclimit for a Nb oxide barrier junction is found to be about 7 × 10⁸A/m²from numerical results, and the Jcvalues that produce bias current margins of greater than 20 % are found by both numerical and experimental results to be less than $2 \\sim 3\\times10^{8}$ A/m². The switching delay obtained experimentally for a DCL-gate with a Jcvalue of $2\\times 10^{8}$ A/m²is 5.6 ps, which is in good agreement with the numerical result.

Keywords

Josephson device logic; Circuits; Current density; Delay; Josephson junctions; Laboratories; Magnetic confinement; Magnetic switching; Niobium; Velocity measurement; Voltage;

fLanguage

English

Journal_Title

Magnetics, IEEE Transactions on

Publisher

ieee

ISSN

0018-9464

Type

jour

DOI

10.1109/TMAG.1985.1063698

Filename

1063698

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1008829