• DocumentCode
    1009052
  • Title

    Miniaturization of Josephson logic circuits

  • Author

    Ko, H. ; Van Duzer, T.

  • Author_Institution
    University of California, Berkeley, CA
  • Volume
    21
  • Issue
    2
  • fYear
    1985
  • fDate
    3/1/1985 12:00:00 AM
  • Firstpage
    725
  • Lastpage
    728
  • Abstract
    The performances of Current Injection Logic (CIL) and Resistor Coupled Josephson Logic (RCJL) have been evaluated for minimum features sizes ranging from 5 μm to 0.2 μm. The logic delay is limited to about 10 ps for both the CIL AND gate and the RCJL OR gate biased at 70% of maximum bias current. The maximum circuit count on an 6.35 × 6.35 chip is 13,000 for CIL gates and 20,000 for RCJL gates, Some suggestions are given for further improvements.
  • Keywords
    Josephson device logic; Coupling circuits; Critical current; Critical current density; Delay; Inductance; Josephson junctions; Logic circuits; Logic devices; Resistors; Voltage;
  • fLanguage
    English
  • Journal_Title
    Magnetics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9464
  • Type

    jour

  • DOI
    10.1109/TMAG.1985.1063716
  • Filename
    1063716
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1009052