• DocumentCode
    1009222
  • Title

    Fast Configurable-Cache Tuning With a Unified Second-Level Cache

  • Author

    Gordon-Ross, Ann ; Vahid, Frank ; Dutt, Nikil D.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Florida, Gainesville, FL
  • Volume
    17
  • Issue
    1
  • fYear
    2009
  • Firstpage
    80
  • Lastpage
    91
  • Abstract
    Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or a second level with separate instruction and data configurable caches. We instead use a commercially-common unified second level cache, a seemingly minor difference that actually expands the configuration space from 500 to about 20 000. We develop additive way tuning for tuning a cache subsystem with this large space, yielding 61% energy savings and 9% performance improvements over a nonconfigurable cache, greatly outperforming an extension of a previous method.
  • Keywords
    cache storage; memory architecture; commercially-common unified second level cache; configurable-cache tuning; data configurable caches; reduce memory hierarchy energy consumption; unified second-level cache; Architecture tuning; cache exploration; cache optimization; configurable cache hierarchy; embedded systems; low energy; low power;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2008.2002459
  • Filename
    4689316