DocumentCode
1019327
Title
An SVM Algorithm to Balance the Capacitor Voltages of the Three-Level NPC Active Power Filter
Author
Zhang, Huibin ; Finney, Stephen Jon ; Massoud, Ahmed ; Williams, Barry Wayne
Author_Institution
Dept. of Electron. & Electr. Eng., Univ. of Strathclyde, Glasgow
Volume
23
Issue
6
fYear
2008
Firstpage
2694
Lastpage
2702
Abstract
A requirement of the three-level neutral-point-clamped voltage source inverter, with or without a separately supporting dc link, is to maintain the balance of the two dc-link capacitor voltages. In this paper, balancing of the capacitor voltages for these two dc-link voltage source possibilities is analyzed and an algorithm is proposed to independently balance the capacitor voltages. The algorithm considers the average energy effect of each vector on capacitor voltage and the necessary optimal vector state sequence in each modulation cycle. The algorithm minimizes the voltage rating overheads of the hardware, reduces the voltage ripple, and attenuates the negative effects associated with dc-link voltage oscillations.
Keywords
invertors; power capacitors; power engineering computing; power filters; support vector machines; SVM algorithm; capacitor voltages; dc-link voltage source possibilities; neutral-point-clamped inverter; optimal vector state sequence; three-level NPC active power filter; voltage rating overheads; Capacitor voltage ripple; neutral point diode-clamped (NPC); space vector modulation;
fLanguage
English
Journal_Title
Power Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0885-8993
Type
jour
DOI
10.1109/TPEL.2008.2002820
Filename
4695987
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