DocumentCode
1020244
Title
Enhancing reliability of RTL controller-datapath circuits via Invariant-based concurrent test
Author
Makris, Yiorgos ; Bayraktaroglu, Ismet ; Orailoglu, Alex
Author_Institution
Electr. Eng. Dept., Yale Univ., New Haven, CT, USA
Volume
53
Issue
2
fYear
2004
fDate
6/1/2004 12:00:00 AM
Firstpage
269
Lastpage
278
Abstract
We present a low-cost concurrent test methodology for enhancing the reliability of RTL controller-datapath circuits, based on the notion of path invariance. The fundamental observation supporting the proposed methodology is that the inherent transparency behavior of RTL components, typically utilized for hierarchical off-line test, renders rich sources of invariance within a circuit. Furthermore, additional sources of invariance are obtained by examining the algorithmic interaction between the controller, and the datapath of the circuit. A judicious selection & combination of modular transparency functions, based on the algorithm implemented by the controller-datapath pair, yields a powerful set of invariant paths in a design. Compliance to the invariant behavior is checked whenever the latter is activated. Thus, such paths enable a simple, yet very efficient concurrent test capability, achieving fault security in excess of 90% while keeping the hardware overhead below 40% on complicated, difficult-to-test, sequential benchmark circuits. By exploiting fine-grained design invariance, the proposed methodology enhances circuit reliability, and contributes a low-cost concurrent test direction, applicable to general RTL circuits.
Keywords
benchmark testing; built-in self test; circuit reliability; controllers; design for testability; invariance; sequential circuits; RTL controller-datapath circuit; algorithmic interaction; built-in self-test; concurrent test capability; design for test; fault security; fine-grained design invariance; hierarchical off-line test; inherent transparency behavior; invariant-based concurrent test; modular transparency function; register transfer level; reliability enhancement; sequential benchmark circuit; Application specific integrated circuits; Automatic test pattern generation; Built-in self-test; Circuit faults; Circuit testing; Digital signal processing; Hardware; Logic testing; Signal design; Signal processing algorithms; Algorithmic invariance; concurrent test; controller-datapath; path invariance; transparency;
fLanguage
English
Journal_Title
Reliability, IEEE Transactions on
Publisher
ieee
ISSN
0018-9529
Type
jour
DOI
10.1109/TR.2004.829175
Filename
1308673
Link To Document