• DocumentCode
    1021849
  • Title

    Recursive pseudoexhaustive test pattern generation

  • Author

    Rajski, Janusz ; Tyszer, Jerzy

  • Author_Institution
    Dept. of Electr. Eng., McGill Univ., Montreal, Que., Canada
  • Volume
    42
  • Issue
    12
  • fYear
    1993
  • fDate
    12/1/1993 12:00:00 AM
  • Firstpage
    1517
  • Lastpage
    1521
  • Abstract
    A recursive technique for generating exhaustive patterns is presented. The method is optimal, i.e., in one experiment it covers exhaustively every block of k adjacent inputs in the first 2k vectors. Implementation methods based on characteristic functions of test vectors are provided. They include a parallel pattern generator employing an exclusive-or array, and two serial generators that can be easily adopted in a scan-based built-in self-test environment
  • Keywords
    built-in self test; logic testing; characteristic functions; exclusive-or array; parallel pattern generator; recursive pseudoexhaustive test pattern generation; scan-based built-in self-test; serial generators; test vectors; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Combinational circuits; Digital signal processing; Latches; Memory architecture; System testing; Test pattern generators;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.260644
  • Filename
    260644