The Analysis of System-Level Timing Failures Due to Interconnect Reliability Degradation

The continuous scaling of feature dimensions and the introduction of new dielectric materials are pushing interconnects closer to their reliability limits. Degradation mechanisms are becoming more pronounced, making the interconnect lifetime a challenge at the level of process qualification. Moreover, these mechanisms exhibit new properties, such as gradual degradation of electrical parameters instead of abrupt breakdown phenomena. As a result, it becomes more likely that systems will fail because one of their transistors or wires becomes gradually too slow. These soft failures are not captured by existing tools. The methodology introduced in this paper estimates the impact of two dominant interconnect degradation mechanisms (electromigration and time-dependent dielectric breakdown) on the total system performance. This constitutes a first step toward system-level-driven reliability-aware design for interconnects.