DocumentCode
1026034
Title
Diagnosis by signature analysis of test responses
Author
Karpovsky, Mark G. ; Levitin, Lev B. ; Vainstein, Feodor S.
Author_Institution
Dept. of Electr. Comput. & Syst. Eng., Boston Univ., MA, USA
Volume
43
Issue
2
fYear
1994
fDate
2/1/1994 12:00:00 AM
Firstpage
141
Lastpage
152
Abstract
Proposes a new approach for identification of faulty processing elements based on an analysis of the compressed test response of the system. The test response is compressed first in space and then in time, and faulty processing elements are identified by hard decision decoding of the corresponding space-time signature. The approach results in considerable savings in hardware required for diagnostics
Keywords
fault location; fault tolerant computing; logic testing; parallel processing; array processors; compressed test response; faulty processing elements; hard decision decoding; signature analysis; space-time compression; space-time signature; test responses; Decoding; Fault diagnosis; Fault location; Hardware; Linear feedback shift registers; System buses; System testing; Systems engineering and theory; Systolic arrays; Vectors;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.262119
Filename
262119
Link To Document