• DocumentCode
    1032936
  • Title

    On the Reliability of Majority Gates Full Adders

  • Author

    Ibrahim, Walid ; Beiu, Valeriu ; Sulieman, Mawahib Hussein

  • Author_Institution
    UAE Univ., Al Ain
  • Volume
    7
  • Issue
    1
  • fYear
    2008
  • Firstpage
    56
  • Lastpage
    67
  • Abstract
    This paper studies the reliability of three different majority gates full adder (FA) designs, and compares them with that of a standard XOR-based FA. The analysis provides insights into different parameters that affect the reliability of FAs. The probability transfer matrix method is used to exactly calculate the reliability of the FAs under investigation. All simulation results show that majority gates FAs are more robust than a standard XOR-based FA. They also show how different gates affect the FAs´ reliabilities and are extrapolated to give reliability estimates from the device level. Such reliability analyses should be used for a better characterization of FA designs for future nanoelectronic technologies, in addition to the well-known speed and power consumption (which have long been used for selecting and ranking FA designs).
  • Keywords
    adders; circuit reliability; majority logic; majority gates full adders; power consumption; probability transfer matrix; reliability; Adders; Birth disorders; CMOS technology; Digital arithmetic; Digital signal processors; Electronics industry; Energy consumption; Probability; Robustness; Solid state circuits; Full adders; majority gates; probability of failure; probability transfer matrix; reliability;
  • fLanguage
    English
  • Journal_Title
    Nanotechnology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1536-125X
  • Type

    jour

  • DOI
    10.1109/TNANO.2007.915203
  • Filename
    4429297