DocumentCode
1039335
Title
A Method of Gating for Parallel Computers
Author
Ratz, A.G. ; Smith, V.G.
Author_Institution
University of Toronto, Toronto, Canada.
Volume
70
Issue
1
fYear
1951
fDate
7/1/1951 12:00:00 AM
Firstpage
510
Lastpage
516
Abstract
A method of gating between two flip-flop circuits is described. The circuit uses two diodes and is particularly suited to parallel computers. The theory of the gating action and the necessary design information are given.
Keywords
Arithmetic; Capacitors; Concurrent computing; Diodes; Flip-flops; Master-slave; Pulse circuits; Registers; Shape; Voltage;
fLanguage
English
Journal_Title
American Institute of Electrical Engineers, Transactions of the
Publisher
ieee
ISSN
0096-3860
Type
jour
DOI
10.1109/T-AIEE.1951.5060436
Filename
5060436
Link To Document