DocumentCode
1044379
Title
Yield optimization of integrated circuits
Author
Yanagawa, Takayuki
Author_Institution
Nippon Electric Company, Ltd., Kawasaki, Japan
Volume
20
Issue
1
fYear
1973
fDate
1/1/1973 12:00:00 AM
Firstpage
19
Lastpage
28
Abstract
A design approach is presented that optimizes the component areas of integrated circuits so as to maximize the yield. The performance index to be optimized is defined as the chip yield divided by the chip area, which corresponds to the number of good chips in a wafer. The area of each component is determined to maximize this performance index by a nonlinear programming technique. The design of integrated circuits with respect to the yield may be mostly narrowed down to the determination of component areas, since the process parameters cannot be adjusted individually for each circuit component. This design approach is described in more detail for the kinds of components whose surface areas cannot be uniquely determined by their nominal parameter values. As a demonstration, the width of a diffused resistor in bipolar integrated circuits was optimized for some example circuits. Some useful results have been obtained for the design of circuit patterns.
Keywords
Bipolar integrated circuits; Crystals; Design optimization; Displays; Ink; Integrated circuit yield; Intensity modulation; Performance analysis; Printers; Resistors;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1973.17604
Filename
1477261
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