• DocumentCode
    1051245
  • Title

    Minimum Energy Tracking Loop With Embedded DC–DC Converter Enabling Ultra-Low-Voltage Operation Down to 250 mV in 65 nm CMOS

  • Author

    Ramadass, Yogesh K. ; Chandrakasan, Anantha P.

  • Author_Institution
    Massachusetts Inst. of Technol., Cambridge
  • Volume
    43
  • Issue
    1
  • fYear
    2008
  • Firstpage
    256
  • Lastpage
    265
  • Abstract
    Minimizing the energy consumption of battery-powered systems is a key focus in integrated circuit design. This paper presents an energy minimization loop, with on-chip energy sensor circuitry, that can dynamically track the minimum energy operating voltage of arbitrary digital circuits with changing workload and operating conditions. An embedded DC-DC converter which enables this minimum energy operation is designed to deliver load voltages between 0.25 V to 0.7 V. The minimum energy tracking loop along with the DC-DC converter and test circuitry were fabricated in a 65 nm CMOS process. The area overhead of the control loop is only 0.05 mm2. Measured energy savings of the order of 50%-100% are obtained on tracking the minimum energy point (MEP) as it varies with workload and temperature. The DC-DC converter delivers load voltages as low as 250 mV and achieved an efficiency >80% while delivering load powers of the order of 1 muW and higher from a 1.2 V supply.
  • Keywords
    CMOS integrated circuits; DC-DC power convertors; integrated circuit design; CMOS; battery-powered systems; embedded DC-DC converter; energy consumption; integrated circuit design; minimum energy tracking loop; on-chip energy sensor circuitry; size 65 nm; ultra-low-voltage operation down; voltage 0.25 V to 0.7 V; voltage 250 mV; CMOS process; Circuit testing; DC-DC power converters; Digital circuits; Energy consumption; Energy measurement; Integrated circuit synthesis; Minimization; Tracking loops; Voltage; DC-DC conversion; energy sensor circuitry; minimum energy point; minimum energy tracking loop; subthreshold logic; ultra-low-voltage operation;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2007.914720
  • Filename
    4443207