Associative controlling of monolithic parallel processor architectures

The VLSI implementation of monolithic parallel processor architectures is supported by the ongoing progress of semiconductor technology. Nevertheless, a cost efficient realization of flexible parallel processors, suitable for a broad range of video processing applications, requires efficient schemes for controlling of the provided parallel data paths. Therefore, a novel associative controlling scheme is presented. This approach enables an efficient implementation of monolithic parallel processors at reasonable hardware cost. The paper presents performance data of associative controlling based on a simplified model in comparison to alternative controlling schemes, like SIMD, MIMD, SPMD, and MSIMD. Furthermore, an overview of the architecture of the currently developed associatively controlled PRISMA video signal processor is given