Rapid prototyping on the Georgia Tech digital signal multiprocessor

Signal processing supercomputers consisting of multiple programmable digital signal processors offer impressive computational performance while retaining flexibility of programming. The single most important factor limiting their performance has been the lack of a sophisticated software compiling and scheduling environment. Three generations of digital signal multiprocessors (DSMPs) have been designed at the DSP Laboratory at Georgia Tech in the past decade. The authors develop and discuss the schedulers developed for the Georgia Tech DSMP (I-III), and present new techniques that combine a high level description of DSPs together with a theoretical analysis of the performance bounds on synchronous multiprocessors to deliver a significant improvement in the efficiency of prototyping. The DSMP-C1 prototyping environment is presented in some detail, and its superior performance on digital signal processing applications relative to conventional schedulers is demonstrated