DocumentCode
1058211
Title
High-Efficiency LDMOS Power-Amplifier Design at 1 GHz Using an Optimized Transistor Model
Author
Nemati, Hossein Mashad ; Fager, Christian ; Thorsell, Mattias ; Zirath, Herbert
Author_Institution
Dept. of Microtechnol. & Nanosci., Chalmers Univ. of Technol., Goteborg, Sweden
Volume
57
Issue
7
fYear
2009
fDate
7/1/2009 12:00:00 AM
Firstpage
1647
Lastpage
1654
Abstract
A 10-W LDMOS harmonically tuned power amplifier at 1 GHz with state-of-the-art power-added efficiency of 80% is presented. The fundamental and second-harmonic load impedances are optimized for maximum efficiency while other harmonics are blocked by a low-pass load network. A simplified model of the transistor specialized for harmonically tuned and switched mode operations is proposed and used for the design. Good agreement between simulations and measurements is observed, indicating high accuracy of the model and design approach for these particular applications.
Keywords
MOSFET circuits; UHF power amplifiers; LDMOS; UHF power amplifier; frequency 1 GHz; harmonic load impedances; harmonically tuning; optimized transistor model; power 10 W; power-added efficiency; Harmonically tuned; LDMOS; power amplifier (PA); switched mode;
fLanguage
English
Journal_Title
Microwave Theory and Techniques, IEEE Transactions on
Publisher
ieee
ISSN
0018-9480
Type
jour
DOI
10.1109/TMTT.2009.2022590
Filename
5066989
Link To Document