• DocumentCode
    1063269
  • Title

    Elevated electrode integrated circuits

  • Author

    Sakai, Tetsushi ; Yamamoto, Yousuke ; Kobayashi, Yoshiji ; Yamauti, Hironori ; Ishitani, Tsunehachi ; Sudo, Tsuneta

  • Author_Institution
    Nippon Telegraph and Telephone Public Corporation, Tokyo, Japan
  • Volume
    26
  • Issue
    4
  • fYear
    1979
  • fDate
    4/1/1979 12:00:00 AM
  • Firstpage
    379
  • Lastpage
    385
  • Abstract
    We have developed a new device structure for a bipolar integrated circuit with a propagation delay time of 85 ps/gate and a speed-power product of 0.19 pJ. The remarkable feature of this integrated circuit is its overhanging structure of elevated emitter and collector electrodes, resistors, and interconnections. This paper describes the structure, fabrication process, and performance of this integrated circuit.
  • Keywords
    Bipolar integrated circuits; Electrodes; Fabrication; High speed integrated circuits; Integrated circuit interconnections; Integrated circuit technology; Logic circuits; Logic devices; Propagation delay; Resistors;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1979.19438
  • Filename
    1480016
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1063269