A novel 4K static RAM with submilliwatt standby power

A 4K static RAM has been developed which uses NMOS technology to attain power dissipation levels comparable to those of CMOS 4K RAM´s. Because NMOS technology is used for this part, it exhibits speed compatible with current NMOS microprocessors. The device is based on a self-refreshing dynamic memory cell with asynchronous on-chip refresh which is invisible to the user. This cell lays out in only 1400 µm²which allows a chip size of 5.2 mm × 2.9 mm. As is common with 4K CMOS static RAM´s, a read or write cycle is initiated from the edge of a chip enable (CE) signal. The input buffer for this signal employs a novel design which dissipates power only during transitions. These circuits are described and experimental data on the performance of the RAM are given.