Storage loop definition for Bloch line memories

A technique is presented to delineate correctly the position of the storage loops, i.e. domain walls where the Bloch line pairs have to sit for the operation of the memory. To make the loop confinement technique feasible over a wide range of material parameters, bias field values, and technological parameters, a grooving technique is chosen. A model is first described and various stability conditions are studied. Experimental realization of that technique is then presented and illustrated, and the confinement conditions are compared with the predictions of the model.