DocumentCode
1072800
Title
P-Type Floating Gate for Retention and P/E Window Improvement of Flash Memory Devices
Author
Shen, Chen ; Pu, Jing ; Li, Ming-Fu ; Cho, Byung Jin
Author_Institution
Nat. Univ. of Singapore
Volume
54
Issue
8
fYear
2007
Firstpage
1910
Lastpage
1917
Abstract
A flash memory with a lightly doped p-type floating gate is proposed, which improves charge retention and programming/erase (P/E) Vth window. Improvement in P/E window is enhanced for cells with smaller capacitance coupling ratio, which is important for future scaled flash memory cells. Both device simulation and experimental verification are presented.
Keywords
field effect memory circuits; flash memories; capacitance coupling ratio; charge retention; flash memory devices; p-type floating gate; programming-erase window; Capacitance; Chromium; Electrons; Flash memory; Flash memory cells; Nonvolatile memory; PROM; Physics; Senior members; Space technology; Coupling ratio (CR); Flash memory; electrically erasable programmable read-only memory (EEPROM); floating gate; p-type; retention;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2007.900680
Filename
4277980
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