A new complementary dielectric isolation process for high-voltage devices

A new complementary dielectric isolation process for high-voltage devices has been developed. Both p-type and n-type islands are formed on one chip with a combination of epitaxial growth, anisotropic etching, and some self-alignment techniques. In this technique, the shape, depth, and impurity profile of the islands are precisely controlled, so that the breakdown voltage of more than several hundred volts is easily obtained for the devices formed in the islands.