DocumentCode
1075884
Title
A 104- to 112.8-GHz CMOS Injection-Locked Frequency Divider
Author
Lee, I-Ting ; Tsai, Kun-Hung ; Liu, Shen-Iuan
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume
56
Issue
7
fYear
2009
fDate
7/1/2009 12:00:00 AM
Firstpage
555
Lastpage
559
Abstract
A high-frequency CMOS injection-locked frequency divider (ILFD) is presented by using the distributed LC, series inductor peaking, and multiple-injection techniques. The theoretical analysis for the aforementioned techniques will be given. This ILFD has been fabricated in a 65-nm CMOS process. The core area is 0.4 mm times 0.36 mm without pads. The measured locking range is from 104 to 112.8 GHz, and its power consumption is 7.2 mW from a supply of 1.2 V.
Keywords
CMOS analogue integrated circuits; frequency dividers; inductors; CMOS injection-locked frequency divider; frequency 104 GHz to 112.8 GHz; multiple-injection technique; series inductor peaking; Distributed LC; injection-locked frequency divider; series inductor peaking;
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2009.2023280
Filename
5075639
Link To Document