• DocumentCode
    107940
  • Title

    Programmable DDRx Controllers

  • Author

    Bojnordi, M.N. ; Ipek, Engin

  • Volume
    33
  • Issue
    3
  • fYear
    2013
  • fDate
    May-June 2013
  • Firstpage
    106
  • Lastpage
    115
  • Abstract
    Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource constraints on system performance. A promising way of improving the versatility and efficiency of these controllers is to make them programmable. Unfortunately, the stringent latency and throughput requirements of modern DDRx (double data rate memory interface technology) devices have rendered such programmability largely impractical, confining DDRx controllers to fixed-function hardware. Pardis is the first programmable memory controller that can meet these challenges and thus satisfy the performance requirements of a high-speed DDRx interface.
  • Keywords
    DRAM chips; DRAM timing; address mapping; command scheduling; double data rate memory interface technology; fixed-function hardware; high-speed DDRx interface; memory controllers; power management optimizations; programmable DDRx controllers; resource constraints; Computer architecture; Computer interfaces; Computer programs; Memory management; Programming; DDRx; Pardis; double data rate memory interface technology; memory controllers; programmability;
  • fLanguage
    English
  • Journal_Title
    Micro, IEEE
  • Publisher
    ieee
  • ISSN
    0272-1732
  • Type

    jour

  • DOI
    10.1109/MM.2013.29
  • Filename
    6487474